Nvidia used the opening of GTC Taipei today to announce that TSMC, the world's largest contract chipmaker, will run a widening share of its design and manufacturing workloads on Nvidia accelerated computing. The goal, as the two companies framed it, is faster turnaround, better energy efficiency, higher yield, and tighter operational productivity inside TSMC's advanced fabs.
TSMC is adopting Nvidia's CUDA-X libraries, a stack of GPU-accelerated software tools, across chip-design transfer, transistor modeling, process control, and fab productivity. cuLitho handles computational lithography, the printing method used to transfer chip designs onto silicon wafers, and delivers a 20 to 50 percent improvement in cost or cycle time over CPU-based equivalents. cuEST, a GPU-accelerated electronic structure simulation library, runs chemistry simulations an average of 50 times faster for semiconductor material design. The cuML machine learning library distills hundreds of thousands of process parameters into precision inputs for yield models, reducing variation across thousands of fabrication steps.
Inspection is also moving onto Nvidia hardware. TSMC is pairing Nvidia Metropolis, a video analytics platform, with the TAO Toolkit to classify defects at nanometer scale. The system reduces the need for constant relabeling and retraining as process conditions, inspection tools, and defect types change.
The broadest in scope is FabTwin, a virtual fab environment TSMC is building on Nvidia Omniverse libraries. The digital twin lets engineers test process tool layouts, simulate workflows, and probe constraints before any physical or capital commitment. Advanced fabs at the 2nm node and below rank among the most expensive industrial assets ever built. A virtual-first approach to layout decisions promises to save real money long before concrete is poured.
TSMC has long been the foundry that manufactures Nvidia's chips. It is now also a customer for the software and silicon that run the fab itself.
